A poly-Si thin-film transistor EEPROM cell with a folded floating gate

Abstract

A new polysilicon thin-film transistor (poly-Si TFT) EEP-ROM with the folded floating gate structure has been proposed to suppress the field dependent leakage current at thf programmed state. The control gate folds the floating gate and acts as a field plate to reduce the leakage current. As a result, the leakage current is maintained to the minimum le,cl at an off-state control gate bias, irrespective of the programmed state, which is confirmed bg simulation and experimental results. The fabricated poly-Si TFT EEPROM shows successful programming/erasing operation with a threshold voltage shift of 1 V after 5 x 10(4) program and erase cycles.