A new algorithm called adaptive cluster growth (ACG) for circuit packing (or detailed placement) in any rectilinear region is described; it is an analogy to the growth of a low-stress crystal in a cavity of any given shape. The algorithm ACG is suitable for the packing of circuit modules, either standard-cell or macrocell, in a rectilinear region by the refinement of a result of global placement obtained using such techniques as force-directed relaxation or force-and-cut placement. The overlaps among modules or overlaps between any module and chip boundary are removed in the ACG algorithm in such a way that the estimation of the total routing length is kept as low as possible. An experiment with standard-cell circuits using benchmark data has shown that the ACG algorithm outperforms, or performs close to, other packing techniques that are applicable only to rectangular regions, even in the rectangular-region case. Examples are given to demonstrate the packing of standard-cell circuits in several arbitrarily shaped rectilinear regions. An efficient tiling scheme for representing the rectilinear-shaped cluster and region boundary is also described. The program is written in c, and the VAX 11/750 CPU time for the detailed placement of 752-cell circuits is about 70 s.