DC Field | Value | Language |
---|---|---|
dc.contributor.author | HWANG, GC | ko |
dc.contributor.author | Kyung, Chong-Min | ko |
dc.date.accessioned | 2013-02-27T03:39:03Z | - |
dc.date.available | 2013-02-27T03:39:03Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 1994-01 | - |
dc.identifier.citation | ELECTRONICS LETTERS, v.30, no.1, pp.16 - 17 | - |
dc.identifier.issn | 0013-5194 | - |
dc.identifier.uri | http://hdl.handle.net/10203/66233 | - |
dc.description.abstract | A new hardware scheme is proposed to resolve data and control hazards and assure precise exception on out-of-order execution in a microarchitecture with multiple pipelined functional units. The core of the proposed hardware is a register file called CARE, which is made of CAM (content-addressable memory), with an efficient state-transition mechanism for precise exception handling and prompt branch misprediction recovery. | - |
dc.language | English | - |
dc.publisher | IEE-INST ELEC ENG | - |
dc.title | NEW HARDWARE SCHEME SUPPORTING PRECISE EXCEPTION HANDLING FOR OUT-OF-ORDER EXECUTION | - |
dc.type | Article | - |
dc.identifier.wosid | A1994MT57700012 | - |
dc.identifier.scopusid | 2-s2.0-0028766215 | - |
dc.type.rims | ART | - |
dc.citation.volume | 30 | - |
dc.citation.issue | 1 | - |
dc.citation.beginningpage | 16 | - |
dc.citation.endingpage | 17 | - |
dc.citation.publicationname | ELECTRONICS LETTERS | - |
dc.identifier.doi | 10.1049/el:19940022 | - |
dc.contributor.localauthor | Kyung, Chong-Min | - |
dc.contributor.nonIdAuthor | HWANG, GC | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | COMPUTER ARCHITECTURE | - |
dc.subject.keywordAuthor | PARALLEL ARCHITECTURES | - |
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