MODULE ORIENTATION ALGORITHM USING RECONSTRUCTION OF NETS AND MEAN FIELD ANNEALING
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | KIM, SS | ko |
| dc.contributor.author | Kyung, Chong-Min | ko |
| dc.date.accessioned | 2013-02-25T16:49:42Z | - |
| dc.date.available | 2013-02-25T16:49:42Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 1991-06 | - |
| dc.identifier.citation | ELECTRONICS LETTERS, v.27, no.13, pp.1198 - 1200 | - |
| dc.identifier.issn | 0013-5194 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/63674 | - |
| dc.description.abstract | A new module orientation algorithm using mean field annealing for minimising the half-perimeter routing length of all the nets in a circuit based on a multipin net model is presented. Experimental results on some example circuits have shown 13 to 24% reductions of half-perimeter routing length compared to the initial module orientation which was arbitrarily given. | - |
| dc.language | English | - |
| dc.publisher | INST ENGINEERING TECHNOLOGY-IET | - |
| dc.title | MODULE ORIENTATION ALGORITHM USING RECONSTRUCTION OF NETS AND MEAN FIELD ANNEALING | - |
| dc.type | Article | - |
| dc.identifier.wosid | A1991FU58900053 | - |
| dc.identifier.scopusid | 2-s2.0-0026171845 | - |
| dc.type.rims | ART | - |
| dc.citation.volume | 27 | - |
| dc.citation.issue | 13 | - |
| dc.citation.beginningpage | 1198 | - |
| dc.citation.endingpage | 1200 | - |
| dc.citation.publicationname | ELECTRONICS LETTERS | - |
| dc.identifier.doi | 10.1049/el:19910746 | - |
| dc.contributor.localauthor | Kyung, Chong-Min | - |
| dc.contributor.nonIdAuthor | KIM, SS | - |
| dc.type.journalArticle | Article | - |
| dc.subject.keywordAuthor | ALGORITHMS | - |
| dc.subject.keywordAuthor | CIRCUIT DESIGN | - |
| dc.subject.keywordAuthor | LARGE-SCALE INTEGRATION | - |
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