DC Field | Value | Language |
---|---|---|
dc.contributor.author | Nam, BG | ko |
dc.contributor.author | Kim, HJ | ko |
dc.contributor.author | Yoo, Hoi-Jun | ko |
dc.date.accessioned | 2008-07-22T01:52:57Z | - |
dc.date.available | 2008-07-22T01:52:57Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2007-08 | - |
dc.identifier.citation | IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.42, pp.1767 - 1778 | - |
dc.identifier.issn | 0018-9200 | - |
dc.identifier.uri | http://hdl.handle.net/10203/6235 | - |
dc.description.abstract | A low-power, area-efficient four-way 32-bit multifunction arithmetic unit has been developed for programmable shaders for handheld 3-D graphics systems. It adopts the logarithmic number system (LNS) at the arithmetic core for the single-cycle throughput and the small-size low-power unification of various complicated arithmetic operations such as power, logarithm, trigonometric functions, vector-SIMD multiplication, division, square root and vector dot product. 24-region and 16-region piecewise linear logarithmic and antilogarithmic converters are proposed with 0.8% and 0.02% maximum conversion error, respectively. All the supported operations are implemented with less than 6.3% operation error and unified into a single arithmetic platform with maximum four-cycle latency and single-cycle throughput. A 93 K gate test chip is fabricated using one-poly five-metal 0.18-mu m CMOS technology. It operates at 210 MHz with maximum power consumption of 15.3 mW at 1.8 V. | - |
dc.language | English | - |
dc.language.iso | en_US | en |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.subject | VLSI IMPLEMENTATION | - |
dc.subject | INTERPOLATOR | - |
dc.subject | CONVERTER | - |
dc.subject | PROCESSOR | - |
dc.title | A low-power unified arithmetic unit for programmable handheld 3-D graphics systems | - |
dc.type | Article | - |
dc.identifier.wosid | 000248389300015 | - |
dc.identifier.scopusid | 2-s2.0-34547436736 | - |
dc.type.rims | ART | - |
dc.citation.volume | 42 | - |
dc.citation.beginningpage | 1767 | - |
dc.citation.endingpage | 1778 | - |
dc.citation.publicationname | IEEE JOURNAL OF SOLID-STATE CIRCUITS | - |
dc.embargo.liftdate | 9999-12-31 | - |
dc.embargo.terms | 9999-12-31 | - |
dc.contributor.localauthor | Yoo, Hoi-Jun | - |
dc.contributor.nonIdAuthor | Nam, BG | - |
dc.contributor.nonIdAuthor | Kim, HJ | - |
dc.type.journalArticle | Article; Proceedings Paper | - |
dc.subject.keywordAuthor | computer arithmetic | - |
dc.subject.keywordAuthor | handheld systems | - |
dc.subject.keywordAuthor | logarithmic number system | - |
dc.subject.keywordAuthor | 3-D computer graphics | - |
dc.subject.keywordAuthor | unified arithmetic unit | - |
dc.subject.keywordPlus | VLSI IMPLEMENTATION | - |
dc.subject.keywordPlus | INTERPOLATOR | - |
dc.subject.keywordPlus | CONVERTER | - |
dc.subject.keywordPlus | PROCESSOR | - |
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