A Heuristic Algorithm for Minimal Area CMOS Cell Layout
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Y.J.Kwon | ko |
| dc.contributor.author | Kyung, Chong-Min | ko |
| dc.date.accessioned | 2013-02-24T09:57:21Z | - |
| dc.date.available | 2013-02-24T09:57:21Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 1987-11 | - |
| dc.identifier.citation | 전기학회논문지, v.24, no.6, pp.1060 - 1067 | - |
| dc.identifier.issn | 1975-8359 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/56250 | - |
| dc.language | English | - |
| dc.publisher | 대한전기학회 | - |
| dc.title | A Heuristic Algorithm for Minimal Area CMOS Cell Layout | - |
| dc.type | Article | - |
| dc.type.rims | ART | - |
| dc.citation.volume | 24 | - |
| dc.citation.issue | 6 | - |
| dc.citation.beginningpage | 1060 | - |
| dc.citation.endingpage | 1067 | - |
| dc.citation.publicationname | 전기학회논문지 | - |
| dc.contributor.localauthor | Kyung, Chong-Min | - |
| dc.contributor.nonIdAuthor | Y.J.Kwon | - |
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