시간 및 공간복잡도가 개선된 VLSI 설계규칙 검증 알고리듬A Time and Space Efficient Algorithm for VLSI Geometrical Rule Checking

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Publisher
대한전자공학회
Issue Date
1989-05
Language
Korean
Citation

전자공학회논문지, v.26, no.5, pp.137 - 144

ISSN
1016-135X
URI
http://hdl.handle.net/10203/56071
Appears in Collection
CS-Journal Papers(저널논문)
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