Linearized HBT MMIC power for W-CDMA application

Abstract

This thesis proposes a new on-chip linearization technique and describes its MMIC power amplifier implementation for W-CDMA and PCS/W-CDMA dual band applications, using InGaP/GaAs hetero junction bipolar transistors for 60$\mum^2$ unit emitter area. An on-chip linearizer using a base-emitter voltage predistortion of an active bias transistor is devised and demonstrated. It is composed of an active bias transistor, a resistor, two base-emitter diodes for temperature compensation, and a capacitor for RF signal shorting. The linearizing shunt capacitor with the base emitter diode of an active transistor compensates the decreased base bias voltage of RF amplifier for increasing input power level, and thus improves gain compression and phase distortion of the amplifier and show negligible signal loss to the linearizer with almost no increase in die area. The linearizer increases maximum output power by 11.6dB, phase distortion by 16.49$^\circ$, and power added efficiency by 28% with maintaining base bias voltage of the RF amplifier to thee high input power level. The fabricated two-stage MMIC power amplifier is as small as $840\times1100\mum^2$ including the input matching, inter-stage matching, bias networks, and the linearizer. The amplifier can be used for W-CDMA or PCS/W-CDMA dual band applications because it has broad band characteristics. The two-stage HBT MMIC power amplifier exhibits a linear power gain of 25.5(24.5)dB, an output power of 28(28)dBm, power added efficiency of 43(37)%, and ACPR of -41(-46)dBc at 1.25(5) MHz offset under 3.0V operation voltage, and consumes quiescent current of 90(90)mA at the output power of 0dBm for PCS(W-CDMA) applications.