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A CNN Inference Accelerator on FPGA with Compression and Layer-Chaining Techniques for Style Transfer Applications Kim, Suchang; Jang, Boseon; Lee, Jaeyoung; Bae, Hyungjoon; Jang, Hyejung; Park, In-Cheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.70, no.4, pp.1591 - 1604, 2023-04 |
EPU: An Energy-Efficient Explainable AI Accelerator With Sparsity-Free Computation and Heat Map Compression/Pruning Kim, Junsoo; Han, Seunghee; Ko, Geonwoo; Kim, Ji-Hoon; Lee, Changha; Kim, Taewoo; Youn, Chan-Hyun; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.59, no.3, pp.830 - 841, 2024-03 |
GANPU: An Energy-Efficient Multi-DNN Training Processor for GANs With Speculative Dual-Sparsity Exploitation Kang, Sanghoon; Han, Donghyeon; Lee, Juhyoung; Im, Dongseok; Kim, Sangyeob; Kim, Soyeon; Ryu, Junha; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.56, no.9, pp.2845 - 2857, 2021-09 |
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