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Fast Low-Complexity Triple-Error-Correcting BCH Decoding Architecture Kim, Daesung; Yoo, Injae; Park, In-Cheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.65, no.6, pp.764 - 768, 2018-06 |
High-Throughput and Low-Complexity BCH Decoding Architecture for Solid-State Drives Lee, Youngjoo; Yoo, Hoyoung; Yoo, Injae; Park, In-Cheol, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.22, no.5, pp.1183 - 1187, 2014-05 |
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