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A 550-mu W 10-b 40-MS/s SAR ADC With Multistep Addition-Only Digital Error Correction Cho, Sang-Hyun; Lee, Chang-Kyo; Kwon, Jong-Kee; Ryu, Seung-Tak, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.46, pp.1881 - 1892, 2011-08 |
An 88-dB Max-SFDR 12-bit SAR ADC With Speed-Enhanced ADEC and Dual Registers Baek, Seung-Yeob; Lee, Jae-Kyum; Ryu, Seung-Tak, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.60, no.9, pp.562 - 566, 2013-09 |
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