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EE-Conference Papers(학술회의논문)

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Collection's Items (Sorted by Submit Date in Descending order): 22641 to 22660 of 22906

22641
Efficient Prototyping System Based on Incremental Design and Module-by-Module Verification

Kim, Y; Shin, Youngsoo; Kim, K; Won, J; Choi, K, 1995 IEEE International Symposium on Circuits and Systems, pp.924 - 927, IEEE, 1995-04

22642
Enhancing Schedulability of Hard Real-Time Systems through Codesign

Shin, Youngsoo; Choi, K, IEEE International Symposium on Circuits and Systems, pp.1576 - 1579, IEEE, 1997-06

22643
Enforcing Schedulability of Multi-Task Systems by Hardware-Software Codesign

Shin, Youngsoo; Choi, K, 5th International Workshop on Hardware/Software Codesign, pp.3 - 7, IEEE, 1997-03

22644
Estimation of power distribution in VLSI interconnects

Shin, Youngsoo; Sakurai, T, International Symposium on Low Power Electronics and Design, pp.370 - 375, IEEE, 2001-08

22645
Software Synthesis through Task Decomposition by Dependency Analysis

Shin, Youngsoo; Choi, K, International Conference on Computer-Aided Design (ICCAD), pp.98 - 102, IEEE, 1996-11

22646
Power Optimization of Real-Time Embedded Systems on Variable Speed Processors

Shin, Youngsoo; Choi, K; Sakurai, T, IEEE/ACM International Conference on Computer Aided Design, pp.365 - 368, IEEE, 2000-11

22647
Loop-filtering and post-filtering for low bit-rates moving picture coding

Lee, Y.L.; Park, HyunWook, International Conference on Image Processing (ICIP'99), v.1, pp.94 - 98, IEEE, 1999-10-24

22648
A hybrid delta-sigma modulator with adaptive calibration

Shim, J.H.; Park, In-Cheol; Kim, B., Proceedings of the 2003 IEEE International Symposium on Circuits and Systems, IEEE, 2003-05-25

22649
Global variable localization and transformation for hardware synthesis from high-level programming language description

Lee, J.-Y.; Park, In-Cheol, IEEE International Symposium on Circuits and Systems (ISCAS 2001), v.5, pp.13 - 16, IEEE, 2001-05-06

22650
A LOW-POWERr VARIABLE LENGHT DECODER BASED ON SUCCESSIVE DECODING OF SHOFT CODEWORDS

Lee, SW; Park, In-Cheol, International Symphosium on Circuits and Systems(ISCS), pp.582 - 585, IEEE, 2001-05

22651
Pairing and ordering to reduce hardware complexity in cascade form filter design

Kang, H.-J.; Park, In-Cheol, Proceedings of the 2003 IEEE International Symposium on Circuits and Systems, IEEE, 2003-05-25

22652
A 24-bit floating-point audio DSP controller supporting fast exponentiation

Lee, S.-W.; Kang, H.-J.; Park, In-Cheol, Proceedings of the 2003 IEEE International Symposium on Circuits and Systems, IEEE, 2003-05-25

22653
Quadrature direct digital frequency synthesis using fine-grain angle rotation

Lee, S.-W.; Park, In-Cheol, 2004 IEEE International Symposium on Cirquits and Systems - Proceedings, IEEE, 2004-05-23

22654
Memory-based low density parity check code decoder architecture using loosely coupled two data-flows

Kang, S.-H.; Park, In-Cheol, 2004 IEEE International Symposium on Cirquits and Systems - Proceedings, IEEE, 2004-05-23

22655
Low-power log-map turbo decoding based on reduced metric memory access

Lee, D.-S.; Park, In-Cheol, IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005, pp.3167 - 3170, IEEE, 2005-05-23

22656
Low-power hybrid turbo decoding based on reverse calculation

Choi, H.-M.; Kim, J.-H.; Park, In-Cheol, ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, pp.2053 - 2056, IEEE, 2006-05-21

22657
High speed decoding of context-based adaptive binary arithmetic codes using most probable symbol prediction

Kim, C.-H.; Park, In-Cheol, ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, pp.1707 - 1710, IEEE, 2006-05-21

22658
Combined image signal processing for CMOS image sensors

Kim, O.; Park, In-Cheol, ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, pp.3185 - 3188, IEEE, 2006-05-21

22659
Energy-efficient double-binary tail-biting turbo decoder based on border metric encoding

Kim, J.-H.; Park, In-Cheol, IEEE International Symposium on Circuits and Systems, ISCAS 2007, pp.1325 - 1328, 2007-05-27

22660
A 5-GHZ self-calibrated I/Q clock generator using a quadrature LC-VCO

Ahn, H.K.; Park, In-Cheol; Kim, B., Proceedings of the 2003 IEEE International Symposium on Circuits and Systems, pp.797 - 800, IEEE, 2003-05-25

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