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Results 1-4 of 4 (Search time: 0.002 seconds).

NO Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date)
1
A chip-package hybrid DLL loop and clock distribution network for low-jitter clock delivery

Chung, D.; Ryu, C.; Kim, H.; Lee, C.; Kim, J.; Kim, J.; Bae, K.; Yu, J.; Lee, S.; Yoo, H.; Kim, Joungho, 2005 IEEE International Solid-State Circuits Conference, ISSCC, v.48, pp.514 - 614, 2005-02-06

2
Co-modeling and co-simulation of package and on-chip decoupling capacitor for resonant free power/ground network design

Park, H.; Kim, H.; Kam, D.G.; Kim, Joungho, 55th Electronic Components and Technology Conference, ECTC, pp.727 - 731, IEEE, 2005-05-31

3
Broadband suppression of SSN and radiated emissions using high-DK thin film EBG power distribution network for high-speed digital PCB applications

Lee, J.; Kim, H.; Kim, Joungho, International Symposium on Electromagnetic Compatibility, EMC 2005, pp.967 - 970, IEEE, 2005-08-08

4
Noise generation, coupling, isolation, and EM raidaiton in high-speed package and PCB

Kim, Joungho; Pak, J.; Park, J.; Kim, H., IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005, pp.5766 - 5769, IEEE, 2005-05-23

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