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| NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
|---|---|
| Design methodology of passive equalizer for GDDR6 memory test Kim, Subin; Kim, Seongguk; Kim, Hyesoo; Cho, Kyungjun; Kim, Joungho, 2019 Joint International Symposium on Electromagnetic Compatibility, Sapporo and Asia-Pacific International Symposium on Electromagnetic Compatibility, EMC Sapporo/APEMC 2019, pp.270 - 273, Institute of Electrical and Electronics Engineers Inc., 2019-06 | |
| Modeling and analysis of multiple coupled through-silicon vias (TSVs) for 2.5-D/3-D ICs Cho, Kyungjun; Kim, Youngwoo; Park, Junyong; Kim, Hyesoo; Kim, Seongguk; Kim, Subin; Park, Gap Yeol; Son, Kyungjune; Kim, Joungho, Joint International Symposium on Electromagnetic Compatibility, Sapporo and Asia-Pacific International Symposium on Electromagnetic Compatibility, EMC Sapporo/APEMC 2019, pp.346 - 349, Institute of Electrical and Electronics Engineers Inc., 2019-06 | |
| Electrical performance comparison between coaxial and non-coaxial silicone rubber socket Park, Junyong; Ha, Dongho; Shin, Taein; Kim, Seongguk; Park, Hyunwook; Lho, Daehwan; Cho, Kyungjun; Kim, Hyesoo; Kim, Joungho; Bae, Michael, 2019 Joint International Symposium on Electromagnetic Compatibility, Sapporo and Asia-Pacific International Symposium on Electromagnetic Compatibility, EMC Sapporo/APEMC 2019, pp.293 - 296, Institute of Electrical and Electronics Engineers Inc., 2019-06 |
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