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1
A 9.1 ENOB 21.7fJ/conversion-step 10b 500MS/s single-channel pipelined SAR ADC with a current-mode fine ADC in 28nm CMOS

Moon, Kyoung-Jun; Kang, Hyun-Wook; Jo, Dong-Shin; Kim, Mi-Young; Baek, Seung-Yeob; Choi, Michael; Ko, Hyung-Jong; et al, 31st Symposium on VLSI Circuits, pp.C94 - C95, IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 2017-06-07

2
An 8.6 ENOB 900MS/s Time-Interleaved 2b/cycle SAR ADC with a 1b/cycle Reconfiguration for Resolution Enhancement

Hong, Hyeok-Ki; Kang, Hyun-Wook; Sung, Barosaim; Lee, Choong-Hoon; Choi, Michael; Park, Ho-Jin; Ryu, Seung-Tak, 2013 IEEE International Solid-State Circuits Conference, IEEE, 2013-02-20

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