Showing results 1 to 6 of 6
A 24-bit floating-point audio DSP controller supporting fast exponentiation Lee, S.-W.; Kang, H.-J.; Park, In-Cheol, Proceedings of the 2003 IEEE International Symposium on Circuits and Systems, IEEE, 2003-05-25 |
Digital filter synthesis based on minimal signed digit representation Park, In-Cheol; Kang, H.-J., 38th Design Automation Conference, pp.468 - 473, DAC, 2001-06-18 |
High-speed and low-latency decoding of Reed-Solomon codes Kang, H.-J.; Park, In-Cheol, 2002 IEEE International Symposium on Information Theory, pp.87, IEEE, 2002-06-30 |
Multiplier-less IIR filter synthesis algorithms to trade-off the delay and the number of adders Kang, H.-J.; Park, In-Cheol, IEEE International Symposium on Circuits and Systems (ISCAS 2001), v.2, pp.693 - 696, IEEE, 2001-05-06 |
Pairing and ordering to reduce hardware complexity in cascade form filter design Kang, H.-J.; Park, In-Cheol, Proceedings of the 2003 IEEE International Symposium on Circuits and Systems, IEEE, 2003-05-25 |
SAT-based unbounded symbolic model checking Kang, H.-J.; Park, In-Cheol, Proceedings of the 40th Design Automation Conference, pp.840 - 843, 2003-06-02 |
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