Showing results 4 to 6 of 6
Multiplier-less IIR filter synthesis algorithms to trade-off the delay and the number of adders Kang, H.-J.; Park, In-Cheol, IEEE International Symposium on Circuits and Systems (ISCAS 2001), v.2, pp.693 - 696, IEEE, 2001-05-06 |
Pairing and ordering to reduce hardware complexity in cascade form filter design Kang, H.-J.; Park, In-Cheol, Proceedings of the 2003 IEEE International Symposium on Circuits and Systems, IEEE, 2003-05-25 |
SAT-based unbounded symbolic model checking Kang, H.-J.; Park, In-Cheol, Proceedings of the 40th Design Automation Conference, pp.840 - 843, 2003-06-02 |
Discover