Browse "EE-Conference Papers(학술회의논문)" by Title
Showing results 841 to 860 of 22892
| A 60GHz stripline BPF for LTCC system-in-package applications Lee, Y.C.; Park, Chul Soon, 2005 IEEE MTT-S International Microwave Symposium, v.2005, no.0, pp.1413 - 1416, 2004 IEEE MTT-S IMS, 2005-06-12 |
| A 60kb/s-to-10Mb/s 0.37nJ/b adaptive-frequency-hopping transceiver for body-area network Cho, N.; Lee, J.; Yan, L.; Bae, J.; Kim, S.; Yoo, Hoi-Jun, 2008 IEEE International Solid State Circuits Conference, ISSCC, pp.132 - 133, 2008-02-03 |
| A 60uW 10Mb/s fully digital FSK demodulator for power-jitter efficient medical BAN Lee, H.; Roh, T.; Bae, J.; Yoo, Hoi-Jun, 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010, pp.504 - 507, IEEE, 2010-12-06 |
| A 635 μw non-contact compensation IC for body channel communication Lee, Kyoung-Rog; Jang, Jaeeun; Cho, Hyunwoo; Yoo, Hoi-Jun, 2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016, pp.1406 - 1409, Institute of Electrical and Electronics Engineers Inc., 2016-05 |
| A 64 mu W, 23 dB Gain, 8 dB NF, 2.4 GHz RF Front-end for Ultra-Low Power Internet-of-Things Transceivers Anjana, Dissanayake; Seok, Hyun-Gi; Jung, Oh-Yong; Han, Sok; Lee, Sang-Gug, IEEE Radio Frequency Integrated Circuits Symposium (RFIC), pp.184 - 187, IEEE, 2017-06 |
| A 646GOPS/W multi-classifier many-core processor with cortex-like architecture for super-resolution recognition Park, Joonyoung; Hong, Injoon; Kim, Gyeonghoon; Kim, Youchang; Lee, Kyuho; Park, Seongwook; Bong, Kyeongryeol; et al, IEEE International Solid-State Circuits Conference (ISSCC), 2013 , pp.168 - 169, IEEE, 2013-02-19 |
| A 64k-Bit High-Density OTP ROM Array with 3-Transistor Cell Standard CMOS Gate-Oxide Antifuse Lee, Kwyro; Kim, Jinbong, Samsung Humantech, 2004 |
| A 650-uW 30-Mbps Galvanic Coupling Communication Receiver for Bionic Arms Jeon, Yeseul; Jeon, Hyuntak; Cheon, Song-I; Jung, Chongsoo; Je, Minkyu, IEEE International Symposium on Circuits and Systems, IEEE, 2018-05-28 |
| A 66fps 3 8mW nearest neighbor matching processor with hierarchical VQ algorithm for real-time object recognition Kim, Joo-Young; Kim, Kwanho; Lee, Seungjin; Kim, Minsu; Yoo, Hoi-Jun, 2008 IEEE Asian Solid-State Circuits Conference, IEEE, 2008-11-03 |
| A 66fps 38mW nearest neighbor matching processor with hierarchical VQ algorithm for real-time object recognition Kim, Joo-Young; Kim, Kwanho; Lee, Seungjin; Kim, Minsu; Yoo, Hoi-Jun, 2008 IEEE Asian Solid-State Circuits Conference, A-SSCC 2008, pp.177 - 180, Institute of Electrical and Electronics Engineers Inc., 2008-11-03 |
| A 67-pJ/bit 435-MHz 16-QAM modulator for capsule endoscopy system with 18-ns start-up using transient DC error correction Youn, Donghyun; Je, Minkyu, 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021, Institute of Electrical and Electronics Engineers Inc., 2021-05 |
| A 670ps, 64bit dynamic low-power adder design Yoo, Hoi-Jun; Woo, Ramchan; Lee, Se-Joong, IEEE International Symposium on Circuits and Systems, pp.I-28 - I-31, IEEE, 2000-05 |
| A 6b 28GS/s Four-channel Time-interleaved Current-Steering DAC with Background Clock Phase Calibration Kim, WooCheol; Jo, Dong Shin; Roh, Yi-Ju; Kim, Ye Dam; Ryu, Seung-Tak, 39th Symposium on VLSI Technology / 33rd Symposium on VLSI Circuits, pp.C138 - C139, IEEE, 2019-06-11 |
| A 6bit 1GS/s Time-interleaved Flash-SAR A/D Converter for Ultra Wide Band System Ryu, Seung-Tak; Sung, B.R.S.; Lee, Chang-Kyo; Kim, Jong-In, TriSAI 2010, 2010 |
| A 6Gb/s transceiver with a nonlinear electronic dispersion compensator for directly modulated distributed-feedback lasers Kwon, Kyeongha; Yoon, Jonghyeok; Kwon, Soon Won; Yang, Jaehyeok; Lee, Joon Yeong; Won, Hyo Sup; Bae, Hyeon-Min, International Solid-State Circuits Conference, pp.138 - 139, IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 2014-02-10 |
| A 6Gb/s/pin pseudo-differential signaling using common-mode noise rejection techniques without reference signal for DRAM interfaces Ha, K.-S.; Kim, Lee-Sup; Bae, S.-J.; Park, K.-I.; Choi, J.S.; Jun, Y.-H.; Kim, K., 2009 IEEE International Solid-State Circuits Conference ISSCC 2009, pp.138 - 139, 2009-02-08 |
| A 6Gbps SSD Controller using Low-complexity and Time-interleaved BCH Encoder/Decoder Lee, Youngjoo; Yoo, Hoyoung; Yoo, Injae; Park, In-Cheol, IEEE International SoC Design Conference (ISOCC 2011) Chip Design Contest, IEEE, 2011-11-17 |
| A 7 mW 2.5 GHz Spread Spectrum Clock Generator Using Switch-Controlled Injection-Locked Oscillator Yang, Jeongmin; Kim, Young-Ju; Kim, Lee-Sup, 2013 International Symposium on Circuits and Systems, pp.1392 - 1395, IEEE, 2013-05 |
| A 7.1GB/s low-power 3D rendering engine in 2D array-embedded memory logic CMOS Park, Y.-H.; Han, S.-H.; Kim, J.-S.; Lee, S.-J.; Kook, J.-H.; Lim, J.-W.; Woo, R.; et al, 2000 IEEE International Solid-State Circuits Conference 47th Annual ISSCC, pp.242 - 243, 2000-02-07 |
| A 7.34Gb/s (70528, 65536) Concatenated-BCH Encoder Using Two-dimensional Encoding Scheme 이영주; 유호영; 정재환; 조지혁; 박인철, 대한전자공학회 하계종합학술대회, 대한전자공학회, 2013-07-03 |
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