Batching and input regulation in the photolithography process for memory chips fabrication

Abstract

We consider the photolithography process for memory chips fabrication. Each wafer is processed at the same machine each time it reenters the process. A stepper in the process requires delicate setup for processing of each circuit layer. We investigate the batch sizes in the steppers. To do this, we use a simplified simulation model that aggregates the other fabrication processes into a single queueing station. We also investigate input regulation policies for the photolithography process. Relationships between performance measures, batch sizes, and input policies are discussed using simulation experiments.