(An) implementation of the variable length coding/decoding in real-time encoding/decoding system(REDS) for HDTV editing

Abstract

This thesis introduces an implementation of real-time variable length coding/decoding architecture in the Real-time Encoding/Decoding System (REDS) for HDTV applications. It is very difficult to implement a real-time variable length encoder/decoder due to very high data rate of HDTV. The bandwidth of video signal in HDTV systems exceeds 140 Mbytes/sec. The REDS is a high-performance image processing system with parallel architecture, which is designed for real-time image processing. The several architectures for real-time operation of variable length coding/decoding are described as follow: Parallel architecture is considered and the large high-definition image is spatially partitioned for multiprocessors. A parallel architecture for entropy coding system can achieve high throughput with low speed requirement. In order to reduce memory size and get fast accessing time for variable length coding/decoding, the address of PROM is mapped with run-level pairs efficiently. The PROM contains both the code and the length at the same address so that the logic size is reduced. Also, the separation structure is used to improve the encoding/decoding rates. The simulation results show that the introduced implementation can perform variable length encoding/decoding in real-time.