DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Park, Song-Bae | - |
dc.contributor.advisor | 박송배 | - |
dc.contributor.author | Han, Il-Song | - |
dc.contributor.author | 한일송 | - |
dc.date.accessioned | 2011-12-14T02:20:33Z | - |
dc.date.available | 2011-12-14T02:20:33Z | - |
dc.date.issued | 1981 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=63052&flag=dissertation | - |
dc.identifier.uri | http://hdl.handle.net/10203/39559 | - |
dc.description | 학위논문(석사) - 한국과학기술원 : 전기 및 전자공학과, 1981.2, [ [iii], 50 p. ] | - |
dc.description.abstract | Internally compensated operational amplifiers have been designed for the purpose of a switched capacitor filter application assuming a standard n-channel silicon-gate enhancement/depletion MOS process. Specifications of one of the designed operational amplifiers are: open-loop gain=1,100, power consumption=20 mW, commonmode rejection ratio=60 dB, slew rate=1.2 V/uS, unity-gain bandwidth=340 KHz and phase margin=85.5$^\circ$. Those of the other are: open-loop gain=1,300, power consumption=30 mW, slew rate=2.1 V/uS, unity-gain bandwidth=880 KHz and phase margin=65$^\circ$, and common-mode rejection ratio=60 dB. As a preliminary study of complete integration of switched capacitor filters, modelling the MOSFET as a switch is considered. Experimental results for specially designed integrated MOS test chips, are used to determine a reasonable model of the MOSFET as a switch. | eng |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.title | Design of MOS operational amplifiers and modelling of switches in switched capacitor filters | - |
dc.title.alternative | 연산증폭기의 설계와 스위치드 커패시터 필터에서의 스위치의 모델링 | - |
dc.type | Thesis(Master) | - |
dc.identifier.CNRN | 63052/325007 | - |
dc.description.department | 한국과학기술원 : 전기 및 전자공학과, | - |
dc.identifier.uid | 000791286 | - |
dc.contributor.localauthor | Park, Song-Bae | - |
dc.contributor.localauthor | 박송배 | - |
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