Polynomial MOS delay model 을 이용한 스윗치 레벨 논리 시뮬레이터Switch level logic simulator using polynomial MOS delay model
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.advisor | 박송배 | - |
| dc.contributor.advisor | Park, Song-Bai | - |
| dc.contributor.author | 전기 | - |
| dc.contributor.author | Jeon, Ki | - |
| dc.date.accessioned | 2011-12-14T02:16:02Z | - |
| dc.date.available | 2011-12-14T02:16:02Z | - |
| dc.date.issued | 1988 | - |
| dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=66321&flag=dissertation | - |
| dc.identifier.uri | http://hdl.handle.net/10203/39257 | - |
| dc.description | 학위논문(석사) - 한국과학기술원 : 전기 및 전자공학과, 1988.2, [ [iii], 61 p. ] | - |
| dc.language | kor | - |
| dc.publisher | 한국과학기술원 | - |
| dc.title | Polynomial MOS delay model 을 이용한 스윗치 레벨 논리 시뮬레이터 | - |
| dc.title.alternative | Switch level logic simulator using polynomial MOS delay model | - |
| dc.type | Thesis(Master) | - |
| dc.identifier.CNRN | 66321/325007 | - |
| dc.description.department | 한국과학기술원 : 전기 및 전자공학과, | - |
| dc.identifier.uid | 000861381 | - |
| dc.contributor.localauthor | 박송배 | - |
| dc.contributor.localauthor | Park, Song-Bai | - |
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- EE-Theses_Master(석사논문)
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