(An) implementation of floorplanner using simulated annealingSimulated annealing algorithm을 이용한 floorplanner의 구현

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dc.contributor.advisorPark, Song-Bae-
dc.contributor.advisor박송배-
dc.contributor.authorYun, Dong-Sik-
dc.contributor.author윤동식-
dc.date.accessioned2011-12-14T02:15:39Z-
dc.date.available2011-12-14T02:15:39Z-
dc.date.issued1988-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=66294&flag=dissertation-
dc.identifier.urihttp://hdl.handle.net/10203/39231-
dc.description학위논문(석사) - 한국과학기술원 : 전기 및 전자공학과, 1988.2, [ [ii], 59, [1] p. ]-
dc.description.abstractThe automatic placement becomes more and more important in Computer Aided Design (CAD) as the integrated-circuit density increases. However, the placement problem has been known NP-complete, and thus several heuristic algorithms have been developed. In this thesis, the simulated annealing algorithm, a general-purpose method of combinatorial optimization problem, is applied to the following placement problems, i.e., fixed grid placement, rigid random block placement and printed circuit boards placement. For each of these problems, the generation method of a new configuration, the definition of a cost function and the control philosophies of various parameters, which are considered on applying the algorithm, are presented and their effects to the convergence of the algorithm are analyzed.eng
dc.languageeng-
dc.publisher한국과학기술원-
dc.title(An) implementation of floorplanner using simulated annealing-
dc.title.alternativeSimulated annealing algorithm을 이용한 floorplanner의 구현-
dc.typeThesis(Master)-
dc.identifier.CNRN66294/325007-
dc.description.department한국과학기술원 : 전기 및 전자공학과, -
dc.identifier.uid000861279-
dc.contributor.localauthorPark, Song-Bae-
dc.contributor.localauthor박송배-
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EE-Theses_Master(석사논문)
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