DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Kwon, Young-Se | - |
dc.contributor.advisor | Lee, Kwy-Ro | - |
dc.contributor.advisor | 권영세 | - |
dc.contributor.advisor | 이귀로 | - |
dc.contributor.author | Han, Jong-Hee | - |
dc.contributor.author | 한종희 | - |
dc.date.accessioned | 2011-12-14T02:14:53Z | - |
dc.date.available | 2011-12-14T02:14:53Z | - |
dc.date.issued | 1990 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=67391&flag=dissertation | - |
dc.identifier.uri | http://hdl.handle.net/10203/39180 | - |
dc.description | 학위논문(석사) - 한국과학기술원 : 전기 및 전자공학과, 1990.2, [ [ii], 48, [1] p. ] | - |
dc.description.abstract | For VLSI application, DCFL is needed due to its low power consumption without decreasing the speed. DCFL requires high gate-to-channel barrier height. Existed GaAs MESFET or HFETs whose gate materials are metal or $n^+$-semiconductor have low barrier heights, 0.7-1.2[eV]. On the other hand $p^+$-type. GaAs gate offers a higher barrier height, -1.8 [eV] for channel electrons. But the barrier height for the holes in $p^+$ -type gate is -1.4 [eV]. The fabricated PI-HFETs show 1.2[V] cut-in voltage. | eng |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.title | (The) fabrication and characterization of PI-HFET (P-type insulated gate heterostructure FET) | - |
dc.title.alternative | PI-HFET(P-type insulated gate heterostructure FET)의 제작과 특성 측정 | - |
dc.type | Thesis(Master) | - |
dc.identifier.CNRN | 67391/325007 | - |
dc.description.department | 한국과학기술원 : 전기 및 전자공학과, | - |
dc.identifier.uid | 000881530 | - |
dc.contributor.localauthor | Kwon, Young-Se | - |
dc.contributor.localauthor | Lee, Kwy-Ro | - |
dc.contributor.localauthor | 권영세 | - |
dc.contributor.localauthor | 이귀로 | - |
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