DC Field | Value | Language |
---|---|---|
dc.contributor.author | KOO, YS | ko |
dc.contributor.author | Kang, Sang-Won | ko |
dc.contributor.author | AN, C | ko |
dc.date.accessioned | 2008-04-16T08:40:35Z | - |
dc.date.available | 2008-04-16T08:40:35Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 1992-08 | - |
dc.identifier.citation | JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES REVIEW PAPERS, v.31, no.8, pp.2400 - 2406 | - |
dc.identifier.issn | 0021-4922 | - |
dc.identifier.uri | http://hdl.handle.net/10203/3917 | - |
dc.description.abstract | This paper presents a new device called SAVEN (self-aligned device using vertical nitride) which has faster switching speed characteristics. To obtain this level of performance, SAVEN adapts the technology reducing the extrinsic base region by controlling the vertical nitride layer. Also, it uses the trench isolation and TiSi2 process of the n+ polysilicon emitter region. The emitter area is designed to be 1.0 x 4.0 mum2. DC characteristics of the fabricated transistor is evaluated and analyzed for the SPICE input parameters. The current gain of the butted npn transistor is around 100, and the breakdown voltage for the collector-to-emitter is 7.5 V. The junction capacitances of base-to-collector and collector-to-substrate are measured at 12 fF and 19 fF, respectively. These low values are due to the small extrinsic base width and elimination of the parasitic capacitance between the epitaxial layer and substrate. From the measurement of the current mode logic (CML) ring oscillator with 31 stages, the minimum propagation delay time per gate is 45 ps at 1.4 mW. | - |
dc.description.sponsorship | The authors are grateful to S.H.Chai, J.G.Koo and J.H.Lee for many helpful discussions. Also they would like to thank Korea Telecommunication (KT) for financial support. | en |
dc.language | English | - |
dc.language.iso | en_US | en |
dc.publisher | JAPAN J APPLIED PHYSICS | - |
dc.title | A HIGH-SPEED SI BIPOLAR-TRANSISTOR WITH SAVEN - (SELF-ALIGNED DEVICE USING VERTICAL NITRIDE) | - |
dc.type | Article | - |
dc.identifier.wosid | A1992JQ79100015 | - |
dc.identifier.scopusid | 2-s2.0-0026902002 | - |
dc.type.rims | ART | - |
dc.citation.volume | 31 | - |
dc.citation.issue | 8 | - |
dc.citation.beginningpage | 2400 | - |
dc.citation.endingpage | 2406 | - |
dc.citation.publicationname | JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES REVIEW PAPERS | - |
dc.identifier.doi | 10.1143/JJAP.31.2400 | - |
dc.embargo.liftdate | 9999-12-31 | - |
dc.embargo.terms | 9999-12-31 | - |
dc.contributor.localauthor | Kang, Sang-Won | - |
dc.contributor.nonIdAuthor | KOO, YS | - |
dc.contributor.nonIdAuthor | AN, C | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | SAVEN | - |
dc.subject.keywordAuthor | EXTRINSIC BASE | - |
dc.subject.keywordAuthor | TISI(2) | - |
dc.subject.keywordAuthor | VERTICAL NITRIDE | - |
dc.subject.keywordAuthor | TRENCH ISOLATION | - |
dc.subject.keywordAuthor | CML | - |
dc.subject.keywordAuthor | RING OSCILLATOR | - |
dc.subject.keywordAuthor | DELAY TIME | - |
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