(An) implementation of communication module for a hypercube multicomputer

Abstract

A communication module for a hypercube multicomputer is designed and implemented. The performance of a hypercube would be increased by providing a dedicated communication processor for interprocessor communications. The communication module consists of a I/O processor, two DMACs, and about one hundred TTL chips. The channel transmission speed is 8Mbps for each channel. Four full-duplexes communication channels are provided for each module. It is shown that they can operate simultaneously with little degradation of transfer rates. Communication kernel, software of communication module, is modularized using layered approach and standardized. Adaptive packet routing algorithms are also suggested for more efficient interprocessor communication facility.