DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Lee, Kwy-Ro | - |
dc.contributor.advisor | 이귀로 | - |
dc.contributor.author | Rho, Kwang-Myoung | - |
dc.contributor.author | 노광명 | - |
dc.date.accessioned | 2011-12-14T02:11:10Z | - |
dc.date.available | 2011-12-14T02:11:10Z | - |
dc.date.issued | 1991 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=60070&flag=dissertation | - |
dc.identifier.uri | http://hdl.handle.net/10203/38928 | - |
dc.description | 학위논문(석사) - 한국과학기술원 : 전기 및 전자공학과, 1991.8, [ [ii], 58 p. ] | - |
dc.description.abstract | An accurate and computationally efficient capacitance-voltage (C-V) model is developed for the circuit simulation of the MOSFET under quasistatic assumption. From the comparison of the long channel measurement data and model calculations, it is shown that our unified C-V model is very accurate for the entire gate, drain and bulk bias. Especially, it provides accurate and smooth C-V expressions in near threshold region and at saturation point which is very useful in small-signal ac analysis. The application of our C-V model to the short channel MOSFET is performed and from the comparison with the device simulation results, it is known that it needs some modifications to apply our model to the small geometry MOSFET. They are related to the secondary effects of the short channel device which are channel length modulation, velocity saturation, mobility degradation by gate fields, and parasitc resistances effects. | eng |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.title | (A) unified quasi-static capacitance-voltage modeling of the MOSFET | - |
dc.title.alternative | 준-정특성 가정하에서의 MOSFET 소자의 통합 정전용량-전압 모델에 대한 연구 | - |
dc.type | Thesis(Master) | - |
dc.identifier.CNRN | 60070/325007 | - |
dc.description.department | 한국과학기술원 : 전기 및 전자공학과, | - |
dc.identifier.uid | 000891130 | - |
dc.contributor.localauthor | Lee, Kwy-Ro | - |
dc.contributor.localauthor | 이귀로 | - |
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