Relay ladder logic을 이용한 시퀀스 제어에 대한 효율적인 design recovery 알고리즘에 관한 연구A study on efficient design recovery algorithm for sequence control with relay ladder logic
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.advisor | 김병국 | - |
| dc.contributor.advisor | Kim, Byung-Kook | - |
| dc.contributor.author | 김재권 | - |
| dc.contributor.author | Kim, Jae-Kweon | - |
| dc.date.accessioned | 2011-12-14T02:02:06Z | - |
| dc.date.available | 2011-12-14T02:02:06Z | - |
| dc.date.issued | 1996 | - |
| dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=105957&flag=dissertation | - |
| dc.identifier.uri | http://hdl.handle.net/10203/38339 | - |
| dc.description | 학위논문(석사) - 한국과학기술원 : 전기 및 전자공학과, 1996.2, [ v, 66 p. ] | - |
| dc.language | kor | - |
| dc.publisher | 한국과학기술원 | - |
| dc.subject | 간략화 | - |
| dc.subject | 등가적인 동작 | - |
| dc.subject | 시퀀스 제어 | - |
| dc.subject | State reduction | - |
| dc.subject | Design recovery | - |
| dc.subject | Timer/Counter | - |
| dc.subject | Extended decomposition method | - |
| dc.subject | Virtual edge method | - |
| dc.title | Relay ladder logic을 이용한 시퀀스 제어에 대한 효율적인 design recovery 알고리즘에 관한 연구 | - |
| dc.title.alternative | A study on efficient design recovery algorithm for sequence control with relay ladder logic | - |
| dc.type | Thesis(Master) | - |
| dc.identifier.CNRN | 105957/325007 | - |
| dc.description.department | 한국과학기술원 : 전기 및 전자공학과, | - |
| dc.identifier.uid | 000943110 | - |
| dc.contributor.localauthor | 김병국 | - |
| dc.contributor.localauthor | Kim, Byung-Kook | - |
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