Design and implementation of energy-efficient analog front-end circuit for a Sub-1V digital hearing aid chip디지털 보청기를 위한 에너지 효율적 적응 아날로그 프론트 엔드의 설계 및 구현

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A low-power, energy-efficient adaptive analog front-end circuit is proposed and implemented from a single 0.9-V supply for digital hearing aid applications. It adopts the combined-gain-control (CGC) technique for accurate preamplification and the adaptive-SNR (ASNR) technique for improvement of dynamic range with low power consumption. The CGC technique integrates an automatic gain control technique and an exponential gain control technique to reduce power dissipation and to control both gain and threshold knee voltage facilely. The ASNR technique offers various kinds of signal-to-noise ratio (SNR) according to input amplitude in order to minimize power consumption and optimize the SNR by environmental monitoring. The proposed analog front-end circuit achieves 86-dB peak SNR while the input-referred noise voltage is 3.8-Vrms. It dissipates a minimum and maximum power of 59.4-μW and 74.7-μW, respectively. The core area is $0.5-mm^2$ in a 0.25-μm standard CMOS technology.
Advisors
Yoo, Hoi-Junresearcher유회준researcher
Description
한국과학기술원 : 전기및전자공학전공,
Publisher
한국과학기술원
Issue Date
2005
Identifier
249603/325007  / 020033094
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학전공, 2005.8, [ vii, 42 p. ]

Keywords

저전력 아날로그 프론트 엔드; 적응 신호대 잡음비 기술; 디지털 보청기; digital hearing aid; combined-gain-control technique; adaptive SNR technique; Analog front-end

URI
http://hdl.handle.net/10203/37928
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=249603&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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