Design of an area-efficient high-speed V-BLAST detector for MIMO-OFDM systems MIMO-OFDM

Abstract

The MIMO-OFDM is the promising technique for the wireless LAN in the next generation. There are many detection algorithms in the MIMO. Among these, we trade off between performance and complexity and select the MMSE V-BLAST method. The communication systems using the OFDM have many sub-channels. This situation needs system using high-speed circuit or system with large memory block. In point of total area of system, we choose the system using high-speed circuit. And there are many methods to make high-speed circuit. Among these, we also use the systolic structure instead of parallel structure to reduce the total area. For system with 4 input antennas and 4 output antennas, we reduce the area of PINV by 12.7% and the area of SORT by 29.3%, each are critical blocks for MMSE V-BLAST circuit. The proposed architecture is implemented using Samsung 0.18um technology. And performance is that the latency is the 258 clocks and the throughput is 36 clocks per 4x4 matrix. The operating frequency and area are 250MHz and 2.5 x 2.5 mm respectivity.