Embedded image processor design for capacitive-type fingerprint sensors

Abstract

A column parallel image processor architecture for capacitive-type fingerprint sensors has been proposed. The image processor performs several 8-bit image processing algorithms, including extracting and thinning the ridge structure of fingerprint for reliable fingerprint verification system. The demonstration chip for 80 ×64 pixel array is designed and simulated. As a simulation result, the execution time of all algorithms is 500ms at 10MHz clock frequency and the size of image processor is only 14.1% of the 320×256 pixel array size. By combining capacitive-type fingerprint sensor with image processor, it can be applied to the personal identification system of portable equipments, such as cellular phones and smart cards.