(An) implementation of the variable length encoder/decoder in real-time encoding/decoding system (REDS) for HDTV

Abstract

This thesis introduces an implementation of real-time variable length encoding/decoding architecture in the Real-time Encodng/Decoding System (REDS) for HDTV application. It is very difficult to implement a real-time variable length encoder/decoder due to very high data rate of HDTV. The REDS is a high-performance image compression/decompression system with parallel architecture, which is designed for real-time image processing. The architectures for real-time operation of variable length encoding/decoding are described as follows: The large HDTV image is spatially partitioned and assigned to several processing units. Each processing unit consists of Multimedia Video Processor for DCT and quantization, and FPLD for entropy coding system. This parallel architecture for entropy coding system can achieve high throughput with low speed requirement. We change the standard coding method for easy hardware implementation. We use PROM for look-up table and efficient PROM addressing method is proposed. The PROM contains both the code and the length at the same address so that the logic size is reduced.