Hardware module interchange format for HW/SW co-simulation하드웨어/소프트웨어 통합시뮬레이션을 위한 hardware module interchange format

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The design of a hardware/software mixed system begins with hardware/software partitioning. To get the advantage of ready-made simulation environments, hardware should be modeled using languages which are suitable for hardware modeling and software should be modeled using general-purpose languages. As a result of the modeling, we get two kinds of models, software models and hardware models. HW/SW co-simulation employs such kinds of models, which should communicate with each other in an appropriate manner. A simulator should invoke appropriate models according to the instructions it receives, and the invoked model may be a software model or a hardware model. For an instruction set simulator, all the models should be of executable form by the simulator, but it will be impossible if the modeling languages are different. This thesis proposes a solution for HW/SW co-simulation using a translation method via HMIF(Hardware Module Interchange Format). By using HMIF can get some advantages. First, models which are described by different description languages can be interchanged easily. With bi-directional translators between hardware description languages, models that are described in one language can be translated to the models described in other languages. As a result, two models described using different languages can be simulated in one simulation environment. Another advantage is that we can apply formal verification methods to models in HMIF which is based on the DEVS(Discrete Event System Specification) semantics. This is a great advantage if translators for various hardware description languages are available because we can apply formal verification methods to the models described using hardware description languages. As an application example, we realized a cosimulation framework with which software models described by C++ and hardware models described by Verilog HDL were cosimulated. The exmaple shows that hardware models translated to C++ by our translator com...
Advisors
Kim, Tag-Gonresearcher김탁곤researcher
Description
한국과학기술원 : 전기및전자공학과,
Publisher
한국과학기술원
Issue Date
1999
Identifier
150841/325007 / 000973166
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학과, 1999.2, [ iv, 62 p. ]

Keywords

Interchange format; Hardware module; Codesign; HW/SW co-simulation; DEVS; 이산사건 시스템 명세기법; 중간단계 형식; 하드웨어 모듈; 코디자인; 하드웨어/소프트웨어 통합시뮬레이션

URI
http://hdl.handle.net/10203/37152
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=150841&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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