고속 움직임 추정 알고리즘에 적합한 VLSI 구조 연구A VLSI architecture for fast motion estimation algorithm

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Advisors
나종범researcherRa, Jong-Beomresearcher
Description
한국과학기술원 : 전기및전자공학과,
Publisher
한국과학기술원
Issue Date
1998
Identifier
134861/325007 / 000963477
Language
kor
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학과, 1998.2, [ vi, 45 p. ]

Keywords

VLSI 구조; MRMCS; 움직임 추정; 블럭 정합 기법; 저 전송률; Low bit rate; VLSI architecture; MRMCS; Motion estimation; BMA

URI
http://hdl.handle.net/10203/37078
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=134861&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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