DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Park, In-Cheol | - |
dc.contributor.advisor | 박인철 | - |
dc.contributor.author | Park, Seong-Il | - |
dc.contributor.author | 박성일 | - |
dc.date.accessioned | 2011-12-14T01:41:58Z | - |
dc.date.available | 2011-12-14T01:41:58Z | - |
dc.date.issued | 1998 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=134829&flag=dissertation | - |
dc.identifier.uri | http://hdl.handle.net/10203/37046 | - |
dc.description | 학위논문(석사) - 한국과학기술원 : 전기및전자공학과, 1998.2, [ v, 45 p. ] | - |
dc.description.abstract | The RSA cryptographic systems require modular exponentiation, which binary or m-ary methods can break into a series of modular multiplications. Montgomery``s modular multiplication is known as a fast modular multiplication algorithm that avoids the division needed to take the modulo reduction. In this thesis, a single-chip 1024-bit RSA processor is designed and implemented in register transfer level using Montgomery modular multiplication algorithm. To achieve high throughput, the pipelined radix-4 booth multiplier which accepts two multiplicands, two multipliers, and an addend as input is employed. The performance is estimated as 80kbit/s for 1024-bit words, resulting in a fast RSA cryptographic processor compared with the previous cryptographic processors. | eng |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | Cryptographic processor | - |
dc.subject | RSA algorithm | - |
dc.subject | High speed | - |
dc.subject | 고속 | - |
dc.subject | 암호프로세서 | - |
dc.subject | RSA 알고리즘 | - |
dc.title | (A) design of fast RSA cryptographic processor | - |
dc.title.alternative | 고속 RSA 암호프로세서의 설계 | - |
dc.type | Thesis(Master) | - |
dc.identifier.CNRN | 134829/325007 | - |
dc.description.department | 한국과학기술원 : 전기및전자공학과, | - |
dc.identifier.uid | 000963238 | - |
dc.contributor.localauthor | Park, In-Cheol | - |
dc.contributor.localauthor | 박인철 | - |
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