Polysilicon thin film transistor EEPROM cell with thin $N_2O$ ECR plasma oxide

Abstract

Electron Cyclotron Resonance (ECR) $N_2O$ plasma oxide is investigated for tunneling oxide of polysilicon thin film transistor EEPROM devices. Nitrogen is incorporated at the $SiO_2$/polysilicon interface and forms strong Si-N bonds. The ECR $N_2O$ plasma oxide has better time-to-breakdown and charge-to-breakdown characteristics than conventional thermal oxide. The $SiO_2$/polysilicon interface of $N_2O$ plasma oxide is smoother than that of thermal oxide. The smooth interface results in good symmetric current-voltage characteristics. A charge to breakdown of 10C/㎠ is achieved, which is obtainable in thermal oxide of crystalline silicon. Worse properties are found in the edge of mesa structures, which is alleviated by eliminating sharp edges by LOCOS isolation. A new poly-Si TFT EEPROM structure is proposed and demonstrated. The proposed structure, which has a folded gate, can maintain the leakage current at the lowest level, independent of the cell state. Suppressed leakage current can improve the reading characteristics which can be a problem in a high density memory array. This leakage current suppression is confirmed. The structure also prevents an overerase during erasing operation. The EEPROM device can operate over than 50000 programming/erasing cycles. A new and simple nonvolatile SRAM cell is proposed as an application of EEPROM. The nonvolatile (NV) SRAM cell is just a conventional SRAM cell with an additional nonvolatile device. The nonvolatile device has two split floating gates and one control gate. The NVSRAM cell operates as an SRAM cell in a normal state, but it can transfer the data to the nonvolatile device during power turn-off. The threshold voltage difference between the two split floating gates changes rising rate of each node potential while restoring the data. The restoring operation is confirmed by SPICE circuit simulation.