(A) study on MOS analog multiplier using unbalanced differential pairs and VGA using pseudo-bipolar transistors비대칭 차동증폭기를 이용한 MOS 애널로그 곱셈기와 준-바이폴러 트랜지스터를 이용한 가변이득 증폭기에 관한 연구

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dc.contributor.advisorLee, Kwy-Ro-
dc.contributor.advisor이귀로-
dc.contributor.authorLee, Sang-O-
dc.contributor.author이상오-
dc.date.accessioned2011-12-14-
dc.date.available2011-12-14-
dc.date.issued1995-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=99144&flag=dissertation-
dc.identifier.urihttp://hdl.handle.net/10203/36270-
dc.description학위논문(박사) - 한국과학기술원 : 전기및전자공학과, 1995.2, [ x, 127 p. ]-
dc.description.abstractWe describe two topics in this dissertation. The first is related to two four-quadrant MOS analog multipliers and the second to a variable gain amplifier. As for the first topic, we propose a difference-squaring circuit which is made up of two unbalanced-differential pairs connected in a simple way. Making use of the proposed circuit, we reach to a novel four-quadrant MOS analog multiplier. The multiplier is based on the quarter-square technique and consists only of four unbalanced-differential pairs with simple connections. The multiplier was integrated using an 1.2-$\mu m$ n-well CMOS process. In result, the multiplier has an advantage in the viewpoint of chip area due to the simple configuration. At the same time, it achieves an overall electrical performance comparable with recently reported MOS multipliers. We propose another new MOS analog multiplier using two ternary source coupled transistors (TSCT``s) where each TSCT consists of three source-coupled transistors. The new multiplier has three considerable advantages. First, as the results of SPICE simulation, it can operate at very high frequencies more than GHz owing to signals passing from input to output via only one transistor and neutralization scheme at the output of charges fed from parasitic capacitors. Second, it has very simple configuration consisting only of six identical transistors connected in a simple way. In other multipliers, the smallest number of transistors was eight. Finally, it does not need the individual wells and thus has the merit of chip area As for the second topic, we design a new variable gain amplifier with emphasis on gain control range and dynamic range, which is based on the Gilbert gain cell technique and consists of two CMOS transconductors and two stages of Gilbert gain cell using new pseudo-bipolar transistors. In design of the VGA, we propose a new pseudo-bipolar transistor and a triode transconductor. First, the new pseudo-bipolar transistor is proposed in order t...eng
dc.languageeng-
dc.publisher한국과학기술원-
dc.title(A) study on MOS analog multiplier using unbalanced differential pairs and VGA using pseudo-bipolar transistors-
dc.title.alternative비대칭 차동증폭기를 이용한 MOS 애널로그 곱셈기와 준-바이폴러 트랜지스터를 이용한 가변이득 증폭기에 관한 연구-
dc.typeThesis(Ph.D)-
dc.identifier.CNRN99144/325007-
dc.description.department한국과학기술원 : 전기및전자공학과, -
dc.identifier.uid000885334-
dc.contributor.localauthorLee, Kwy-Ro-
dc.contributor.localauthor이귀로-
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EE-Theses_Ph.D.(박사논문)
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