Modeling of short-channel effects and edge effects of fully-depleted thin film SOI NMOSFET's완전 공핍된 박막 SOI NMOSFET의 단채널 효과와 가장자리 효과 모델링

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A simple but more accurate analytic short-channel threshold voltage model for fully-depleted thin film SOI NMOSFET is described. The model is derived from 1-dimensional sharing relationship of the channel depletion charge considering the charge coupling between the front gate and the back gate, which is one of the unique properties of the fully-depleted thin film SOI devices. Comparison with the numerical simulations shows that the model gives much better results than the conventional models without the back gate effects. In the mesa-isolated SOI NMOSFET, the edge effects are analyzed with the numerical simulations. With charge sharing concept and the back gate effects, the analytic edge threshold voltage model is derived and verified. The model shows good agreements with the simulations over a wide range of device parameters and it is the first model applicable to the fully-depleted devices. Since the upper corner region of the mesa edge is turned on earlier than all other edge regions, the threshold voltage and the electrical characteristics of the upper corner represent the edge effects of the mesa-isolated devices. Using the Fermi level difference between $n^{+}$-poly Si and $p^{+}$-poly Si, three new device structures having double side gate where the edge effects are eliminated thoroughly are proposed. The realization of proposed devices has some problems in the fabrication process, such as the definition of the side gate and the Boron penetration from $p^{+}$-poly Si to the channel through the gate oxide during high temperature treatment. Edge effects related to the SOI LOCOS isolation technique are studied. Although 3 times LOCOS provides complete isolation between devices, the sharp and thin tip of the bottom corner of the edge region causes the edge effects. In this sharp-edge device, the thinner the field oxide is, the smaller the edge effects become. 4 times LOCOS results in the rounded-edge structure, and the edge doping level necessary to elimin...
Advisors
Kim, Choong-Ki김충기
Description
한국과학기술원 : 전기 및 전자공학과,
Publisher
한국과학기술원
Issue Date
1994
Identifier
69652/325007 / 000785085
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 전기 및 전자공학과, 1994.8, [ v, 105 p. ]

URI
http://hdl.handle.net/10203/36224
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=69652&flag=dissertation
Appears in Collection
EE-Theses_Ph.D.(박사논문)
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