Design and performance analysis of broadband packet switches with banyan network structureBanyan 네트웍 구조를 가진 광대역 패켓 스위치의 설계 및 성능 분석

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Asynchronous transfer mode (ATM) has been widely accepted as the most promising solution to implement the broadband ISDN. But, since ATM is based on the use of very high-speed and reliable fiber optic transmission facilities, it has been very important issue to design a high-performance packet switch to meet the throughput requirements. Thus, various architectures for ATM switches have been proposed, and many of the proposed switching architectures employ the banyan network as a basic building block because of its hardware simplicity and selfrouting capability. In this dissertation work, we study the cut-through buffered banyan and the dilated banyan networks for ATM switch design. First, we present an analytic model for estimating the performance of buffered banyan networks with cut-through. In the analytic model, we assume that the input traffic is uniform and consider throughput and delay as relevant performance measures. In order to consider the dependencies between consecutive time slots, we first analyze two head-of-line (HOL) buffers of a switching element (SE) by introducing the "blocked" state, and then analyze the whole buffer module in the SE with a Markov chain. To validate the analytic model, we compare some analytic results to simulation results. The comparison shows that the analytic results appear to be in good agreement with simulation for light and medium loads, but have small difference from simulation results at heavy load. Next, we propose a dilated banyan network with back-pressure mechanism to fully utilize the routing capacity wasted in a pure dilated banyan network. The proposed switch has both input and output queues, and employs a priority scheme in order to prevent the out-of-sequence problem. We also design the nonblocking SE which is constructed using two sorting networks and a routing stage, in order to reduce the hardware complexity of the dilated network. The performance of the proposed switch is analyzed under the uniform traff...
Advisors
Un, Chong-Kwanresearcher은종관researcher
Description
한국과학기술원 : 전기 및 전자공학과,
Publisher
한국과학기술원
Issue Date
1993
Identifier
68157/325007 / 000865280
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 전기 및 전자공학과, 1993.8, [ v, 121 p. ]

URI
http://hdl.handle.net/10203/36183
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=68157&flag=dissertation
Appears in Collection
EE-Theses_Ph.D.(박사논문)
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