Stepwise-overlapped parallel annealing and its applications단계적으로 중첩된 병렬 시뮬레이티드 어닐링 방법 및 그 응용

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Many real-world design problems are formulated as combinatorial optimization problem in which we seek to find some combinatorial configuration that optimizes the predefined evaluation criterions. Simulated annealing has been proposed as a stochastic approach to the combinatorial optimization problems, and it has produced higher quality (near optimal) solutions for many practical design problems. There has been a great deal of interest in speeding up the simulated annealing algorithms to reduce the burdensome processing time. Multiprocessing is one of the promising research direction to massively speed up the simulated annealing algorithms. This thesis studies the parallelization schemes of the simulated annealing algorithm for efficient implementations on multiprocessor computer systems. The fundamental aspects of the combinatorial optimization problem and the basic ideas of the simulated annealing algorithm are reviewed. The basic decomposition strategies for parallel annealings are categorized into four schemes : decomposition by functions, parallel generations / serializable acceptance, decomposition by objects, and decomposition by Markov chains. The previously proposed parallel annealing algorithms are introduced for their multiprocessor architectures, the application fields, and the decomposition schemes. A new parallel annealing scheme, called stepwise-overlapped parallel annealing, is proposed. It can provide a massive speedup on a multiprocessor system with a large number of processors. The new parallel annealing scheme decomposes the annealing process by the Markov chains. It assigns each Markov chain to each P processors in stepwise-overlapped manner, and let processors generate different Markov chains simultaneously. Each Markov chain takes P (number of processors) information transfers to its following Markov chain. It improved the parallel annealing schedule of the systolic algorithm that was proposed by Aarts et. al. The new parallel anneal...
Advisors
Kim, Myung-Hwanresearcher김명환researcher
Description
한국과학기술원 : 전기 및 전자공학과,
Publisher
한국과학기술원
Issue Date
1990
Identifier
61524/325007 / 000845057
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 전기 및 전자공학과, 1990.2, [ xii, 138 p. ]

URI
http://hdl.handle.net/10203/36117
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=61524&flag=dissertation
Appears in Collection
EE-Theses_Ph.D.(박사논문)
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