DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Kim, Choong-Ki | - |
dc.contributor.advisor | 김충기 | - |
dc.contributor.author | Yoon, Nan-Young | - |
dc.contributor.author | 윤난영 | - |
dc.date.accessioned | 2011-12-14 | - |
dc.date.available | 2011-12-14 | - |
dc.date.issued | 2000 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=157638&flag=dissertation | - |
dc.identifier.uri | http://hdl.handle.net/10203/35844 | - |
dc.description | 학위논문(박사) - 한국과학기술원 : 전기및전자공학전공, 2000.2, [ vii, 96 p. ] | - |
dc.description.abstract | In this dissertation the improved readout circuit for infrared focal plane arrays has been studied. For the improvements of the readout circuit, several ideas have been suggested. The first one is about a new input circuit of current mirroring direct injection and the second and third ones are about signal processing techniques. Readout integrated circuits are composed of several functional blocks. Among these functional devices, the input circuit is the most significant block for the performance of the total circuits. As a new input circuit, we have proposed current mirroring direct injection (CMDI) circuit. The CMDI input circuit can control detector bias automatically and almost 100 % injection efficiency can be obtained even for low $R_DA$ values because we can achieve nearly zero input impedance with this new input circuit. Compared with previous other input circuits, it is expected to have also many advantages such as small area, low power consumption and detector bias stability. The function and performance of the proposed CMDI readout structure has been verified by HSPICE simulation and the measurements on a readout circuit designed and fabricated for MWIR 1×128 staggered linear HgCdTe infrared detector arrays using 1.2 ㎛ single-poly-double-metal N-well CMOS technology. we have also proposed new techniques for on-chip signal processing circuitry. First one is about the new concept of background suppression method, and second one is about time delay integration circuit implementation using CMOS switches and MOS capacitors. When 2-D scanning array are used for IR imaging systems, the technique of time delay integration (TDI) can improve the performance. The TDI circuit is most commonly implemented utilizing a CCD, however it requires special fabrication process and high voltage driving clock inputs. A CMOS circuit for TDI operation is suggested and fabricated. It has really simple structure, and from the experimental results, we were able to verifym its s... | eng |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | IRFPA | - |
dc.subject | Infrared | - |
dc.subject | Readout circuit | - |
dc.subject | Circuit design | - |
dc.subject | 회로설계 | - |
dc.subject | 적외선 감지소자 어레이 | - |
dc.subject | 적외선 | - |
dc.subject | 신호취득 회로 | - |
dc.title | Improved CMOS integrated circuit design and implementation for the readout of infrared focal plane arrays | - |
dc.title.alternative | 적외선 감지소자 어레이의 신호취득을 위한 향상된 CMOS 집적 회로의 설계 및 구현 | - |
dc.type | Thesis(Ph.D) | - |
dc.identifier.CNRN | 157638/325007 | - |
dc.description.department | 한국과학기술원 : 전기및전자공학전공, | - |
dc.identifier.uid | 000955239 | - |
dc.contributor.localauthor | Kim, Choong-Ki | - |
dc.contributor.localauthor | 김충기 | - |
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