A shallow-diffused and self-aligned Metal-JFET(MJFET) for GaAs digital and power integrated circuits is proposed and fabricated. It uses an elemental Zn metal as a diffusion source to a form shallow $p^+$-gate. This approach allows us to pattern the diffusion source together with the gate metal. Therefore $p^+$-gate is self-aligned to the gate metal. Moreover, this shallow diffusion technology using RTA (Rapid Thermal Annealing) makes it possible to obtain a very shallow $p^+$layer typically less than 50nm. This MJFET shows about 0.3V higher gate turn-on voltage and much larger reverse breakdown voltage than the conventional MESFET based on Al-Schottly. Furthermore, both shallow and self-aligning of $p^+$-n junction with gate metal lead MJFET electrical performance comparable to MESFET. For example, MJFET shows transconductances of typically 200mS/mm for $1.5\mu$m-gate length quasi-enhancement device ($V_{th}$ = -0.4V), and 90mS/mm for $4\mu$m gate length deep depletion device at room temperature which are comparable to the conventional Al-gate MESFET. In addition, MJFET shows much better uniformity than MESFET. This is because MESFET characteristics are very much dependent on the Schottky/GaAs interface quality, while MJFET depends much less on surface conditions since its $p^+$-n junction is formed in bulk GaAs.
The temperature sensitivity of MJFET``s is examined and analyzed. MJFET achieved -1.79mV/K and -2.36mV/K for temperature coefficients of threshold voltage ($V_{th}$) and turn-on voltage ($V_f$), respectively, over the temperature coefficients of 27℃-128℃. The reliability of MJFET at the channel temperature 200℃ is tested and two distinct degradation modes are observed. During the initial 1 hr. stress time, the Zn diffuses fast. This is followed by a very slow diffusion. In spite of these two degradation modes, it can be concluded that MJFET has sufficient reliability. Moreover, the first fast degradation can be avoided by a proper annealing during R...