Design of a CMOS hybrid switching amplitude modulator for EDGE polar transmitters

Abstract

This thesis presents a hybrid switching amplitude modulator for class-E2 EDGE polar transmitters. To achieve both high efficiency and high speed, it consists of a wideband buffered linear amplifier as a voltage source and a PWM switching amplifier with a 2MHz switching frequency as a dependent current source. The linear amplifier with a novel class-AB topology has a high current-driving capability of approximately 300mA with a bandwidth wider than 10MHz. It can also operate on four quadrants with very low output impedance of about $200m \ohm$ at the switching frequency attenuating the output ripple voltage less than $12mV_{pp}$. A feedforward path, a PWM control and a third-order ripple filter are used to reduce the current burden of the linear amplifier. The output voltage of the hybrid modulator ranges from 0.4V to 3V for a 3.5V supply. It can drive an RF power amplifier with an equivalent impedance of $4 \ohm$ up to a maximum output power of 2.25W with a maximum efficiency of 88.3%. The chip is fabricated in a 0.35um CMOS process and occupies an area of $4.7mm^2$. Through a prototype of a polar transmitter made out of a commercial RF power amplifier and a DSP for the function of predistortion, it is demonstrated that this amplitude modulator satisfies the requirements of the output power, the EVM and the spectral mask margin.