DEVS BUS for heterogeneous simulation : architecture, protocol conversion, and implementation이기종 시뮬레이션을 위한 DEVS 버스 : 구조, 프로토콜 변환 및 구현

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In this thesis, we propose a simulation infrastructure for heterogeneous simulation, called DEVS BUS. The DEVS BUS framework consists of a model layer, a DEVS BUS layer, and a transport layer. The model layer includes simulation models developed in different simulation languages/environments. Each model is best suited for describing an aspect of a multifacetted system, and a combination of such models are used for describing the composite behavior of the multifacetted system. The DEVS BUS layer provides a simulation infrastructure on which each model can communicate with each other while synchronizing simulation times and passing messages between them during a simulation. The DEVS BUS is a software bus, and its protocol is based on the DEVS formalism. Each model in a heterogeneous simulation requires to obey the DEVS BUS protocol. For non DEVS-compliant models, their simulation protocol may be different than the DEVS BUS protocol, thus resulting in a simulation protocol mismatch. Protocol conversion is to resolve the protocol mismatch by interposing a protocol converter between a non DEVS-compliant model and the DEVS BUS. Protocol converters are developed based on the delayed execution of local events at node models. We also propose an algebraic approach to the formal protocol conversion from the circuit-theoretic view point. A protocol converter is algebraically constructed from a sender protocol, a receiver protocol, and a message transfer constraint. With a protocol converter, a non DEVS-compliant model is converted into a DEVS-compliant one, and can be connected to the DEVS BUS while communicating with other models in a heterogeneous simulation. The transport layer is used for exchanging DEVS BUS protocol messages among node models and a DEVS BUS controller. Any communication means such as shared memory, TCP/IP, or HLA/RTI can be used as the transport layer. This thesis uses a shared memory interface on a single PC and the HLA/RTI on a network of PCs. The s...
Advisors
Kim, Tag-Gonresearcher김탁곤researcher
Description
한국과학기술원 : 전기및전자공학전공,
Publisher
한국과학기술원
Issue Date
2003
Identifier
181154/325007 / 000945089
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 전기및전자공학전공, 2003.2, [ viii, 102 p. ]

Keywords

Heterogeneous simulation; Protocol conversion; 프로토콜 변환; 이기종 시뮬레이션

URI
http://hdl.handle.net/10203/35141
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=181154&flag=dissertation
Appears in Collection
EE-Theses_Ph.D.(박사논문)
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