DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Choe, Kwang-Moo | - |
dc.contributor.advisor | 최광무 | - |
dc.contributor.author | Kwon, Sook-Young | - |
dc.contributor.author | 권숙영 | - |
dc.date.accessioned | 2011-12-13T06:00:24Z | - |
dc.date.available | 2011-12-13T06:00:24Z | - |
dc.date.issued | 2000 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=157528&flag=dissertation | - |
dc.identifier.uri | http://hdl.handle.net/10203/34362 | - |
dc.description | 학위논문(석사) - 한국과학기술원 : 전산학전공, 2000.2, [ v, 40 p. ] | - |
dc.description.abstract | Instruction scheduling is an important compiler technique for exploiting instruction-level parallelism (ILP) in modern, high-performance microprocessors. Among scheduling techniques, trace scheduling is an optimization technique that performes instruction scheduling across basic blocks. The trace scheduler selects a group of instructions from a sequence of basic blocks and schedules these instructions as if they were in a single basic block. So If operations are moved across basic block boundaries, the compensation copies are inserted into off-traces in order to preserve program``s semantics. But insertion of compensation copies penalizes the off-trace code. The goal of this thesis is to reduce the penalty of off-traces and to overcome the risk from misprediction of branch target especially in control-intensive programs. It deals with the problem of compensation copy codes and presents optimization techniques to enhance the trace scheduling, related to the paths including off-traces. And the effectiveness is evaluated by using SPEC95 benchmark programs. The result shows the feasibility of improvement of trace scheduling with compensation code optimization techniques proposed in this paper. | eng |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | Instruction scheduler | - |
dc.subject | ILP | - |
dc.subject | Trace scheduler | - |
dc.subject | 병렬 컴파일러 | - |
dc.subject | 트레이스 스케줄러 | - |
dc.subject | 명령어 스케줄러 | - |
dc.subject | Parallel compiler | - |
dc.title | Enhanced trace instruction scheduler with code optimizations | - |
dc.title.alternative | 코드최적화에 의한 향상된 트레이스 스케줄러의 구현 | - |
dc.type | Thesis(Master) | - |
dc.identifier.CNRN | 157528/325007 | - |
dc.description.department | 한국과학기술원 : 전산학전공, | - |
dc.identifier.uid | 000983037 | - |
dc.contributor.localauthor | Choe, Kwang-Moo | - |
dc.contributor.localauthor | 최광무 | - |
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