(A) universal systolic chip and their interconnection networkSystolic 데이타 베이스 칩 및 이들의 상호 연결망

Cited 0 time in webofscience Cited 0 time in scopus
  • Hit : 573
  • Download : 0
DC FieldValueLanguage
dc.contributor.advisorCho, Jung-Wan-
dc.contributor.advisor조정완-
dc.contributor.authorKim, Seung-Beom-
dc.contributor.author김승범-
dc.date.accessioned2011-12-13T05:48:48Z-
dc.date.available2011-12-13T05:48:48Z-
dc.date.issued1984-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=64113&flag=dissertation-
dc.identifier.urihttp://hdl.handle.net/10203/33582-
dc.description학위논문(석사) - 한국과학기술원 : 전산학과, 1984.2, [ [ii], 42, [5] p. ]-
dc.description.abstractIn the design of the systolic data base machine for relational data base, there are three major facts to be considered. These are the flexibility of the systolic architecture, decomposition problem of large relations, and interconnection network to increase the performance. In this thesis, a Universal Systolic Chip (USC) for relational D.B and their interconnection network are suggested. USC is designed to perform ten major data base operations in a chip, which can be achieved by programming of USC. The interconnection network of USC is proposed for minimizing the average moving distance of data and for distributing the traffic occured in moving data. The decomposition problem can, also, be solved by this interconnection network.eng
dc.languageeng-
dc.publisher한국과학기술원-
dc.title(A) universal systolic chip and their interconnection network-
dc.title.alternativeSystolic 데이타 베이스 칩 및 이들의 상호 연결망-
dc.typeThesis(Master)-
dc.identifier.CNRN64113/325007-
dc.description.department한국과학기술원 : 전산학과, -
dc.identifier.uid000821054-
dc.contributor.localauthorCho, Jung-Wan-
dc.contributor.localauthor조정완-
Appears in Collection
CS-Theses_Master(석사논문)
Files in This Item
There are no files associated with this item.

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0