Optimal intra-task dynamic voltage scaling technique and its extensions

Abstract

Over the past decades there have been enormous efforts to minimize the energy consumption of CMOS circuit systems. Dynamic voltage scaling (DVS) - involving dynamic adjustments of the supply voltage and the corresponding operating clock frequency - has emerged as one of the most effective energy minimization techniques. This thesis presents a set of comprehensive DVS techniques to reduce energy consumption in hard real-time applications of embedded systems: (1) Based on an execution profile of a task, a voltage scaling technique that optimally determines the operating voltages to individual basic blocks in the task is proposed. (2)We then address the problem of selecting the given number of operating voltages for minimum energy system design (Voltage Set-Up Problem) using the proposed optimal intra-task DVS technique. (3) Finally, a novel extension to deal with the combined inter- and intra-task voltage scaling problem is presented. A set of extensive experimental data is provided to show the effectiveness of the proposed approaches.