Design and applications of parallel fuzzy acceration hardware with defuzzification network

Abstract

In this thesis, we propose two architectures of the fuzzy hardware. One is a system called KAFA(Kaist Fuzzy Accelerator) which provides various fuzzy inference methods and fuzzy set operations. The basic idea of this study is to develop a more general-purpose hardware system. The architecture has SIMD (Single Instruction Multiple Data) structure, which consists of two parts; system control unit(MC: Main Controller) and arithmetic unit(FPE: Fuzzy Processing Element). Microinstruction codes are defined and various fuzzy operations can be programmed using these microinstructions. KAFA has the peak performance of 1.2G FSOPS(Fuzzy Set Operations Per Seconds) under 10MHz clock frequency. This system also includes the parallel algorithms for defuzzification on the SIMD mode architecture using KAFA network. The prototype of the proposed architecture was developed with the FPGA chips. The speed of the KAFA holds promise for the development of the new fuzzy application system such as automatic control, fuzzy expert system, fuzzy database and real time system. Second, we designed a fuzzy logic controller with SIMD architecture. The parallel defuzzification algorithm and network are proposed. This algorithm performs the MOA defuzzification method in the log n + 3 steps, where n is the number of elements of the fuzzy set. The FLC has other powerful features such as active-rule driven architecture and minimization of the membership memory. When FLC operates at 10MHz, for 2 input / 1 output, the proposed FLC has the processing speed of 526K FLOPS. This is nearly 70 times faster than the Pentium-90MHz. Finally, the motion control of piezoelectric scanner that has several nonlinear properties and requires high speed sampling time is introduced. The fuzzy logic controller is designed and applied to this problem. As the results, we achieved some good results comparing with conventional PI controller.