Efficient scheduling algorithms for time-division multiplexed switches시분할 다중스위치를 위한 효율적인 스케쥴링 알고리즘

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There are many applications in the computer and communications fields that require the scheduling of a time-division multiplexed switches that has M input resources and M output resources. This gives rise to a scheduling problem in which the switch is to provide conflict-free connections to switch packets from the $M$ inputs to the M outputs. There are two kinds of issues on scheduling problem. One is a time slot assignment problem which is to find a conflict-free assignment of traffic units to slots such that the frame length is {\it minimized}. The other is a cell scheduling problem which is to avoid output conflicts with the objective of the {\it maximizing} throughput of a switching system. The objective of this thesis is to develop an efficient time slot assignment algorithm and a cell scheduler which it can be easily implemented as a practical scheduler providing high throughput. In this thesis, first we presented a new method for time slot assignment. Unlike previous approaches which are based on network flow model, the novel method, called {\it binary time slot assignment algorithm}, is based on the graph coloring model. When the length of an initial set of time-slot requests is 2``s power, this set is divided into two sets of time-slot requests using binary divide and conquer method based on the graph coloring model. This process is continued until resulting sets of time-slot requests are of length one. The time complexity of the proposed algorithm is $O(NL \log_{2} L)$, where $N$ is the number of input/output links of the central switch and $L$ is the number of time-slots allotted to each link in the frame. Second, we proposed a generalized time slot assignment algorithm, when the length of an initial set of time-slot requests is not equal to 2``s power, using binary time slot assignment algorithm and network flow model. The time complexity of the algorithm is $O(M^3 \cdot \log_{2} L + NL \cdot \log_{2} L)$. As we know, the most efficient algorithm pr...
Advisors
Yoon, Hyun-Sooresearcher윤현수researcher
Description
한국과학기술원 : 전산학과,
Publisher
한국과학기술원
Issue Date
1997
Identifier
114163/325007 / 000925021
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 전산학과, 1997.2, [ vii, 99 p. ]

Keywords

ATM switches; Scheduling algorithm; Gragh coloring; 그래프 칼라링; 메쉬; ATM 스위치; 스케쥴링 알고리즘

URI
http://hdl.handle.net/10203/33081
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=114163&flag=dissertation
Appears in Collection
CS-Theses_Ph.D.(박사논문)
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