Silicon-based synaptic transistors for computing-in-memory

Abstract

With advances of the big data era, memorizing and processing massive data efficiently are dealt with the key factors for the artificial intelligent (AI) technological revolution in recent. Hardware neuromorphic computing, which is inspired by the structures and principles of the human brain, has attracted great attention these days with its energy efficiency by removing the memory bottleneck between memory and processor induced in a conventional von Neumann architecture. Particularly, there has been considerably more active on research about artificial synapses based on electronic devices compared to artificial neurons, since numerous synapses should be connected to a single neuron for implementing an artificial neural network (ANN). For this reason, the silicon channel transistor, which has matured with the development of modern very large-scale integration (VLSI) technology, is one of the promising candidates for an artificial synapse to bring neuromorphic computing as the next-generation computing method. In this study, wafer-scale large-area integrations of silicon-based synaptic transistors for computing-in-memory were proposed in terms of their fabrication, analysis, and applications as artificial synapses. Each of device modulates its GDS by using electrostatic charges induced from ions in the solid-state electrolyte or electrons in the double-layered charge-trap layer, respectively. Proposed synaptic transistors were verified for their applications on feasibility to various purposes of deep neural network (DNN), such as MNIST image recognition using supervised and semi-supervised learning, and abnormal car detection based on video datasets, of ANN processing by using semi-empirical simulation.